document number: 91 072 www.vishay.com s11-0506-rev. b, 21-mar-11 1 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 power mosfet irf9510, sihf9510 vishay siliconix features ? dynamic dv/dt rating ? repetitive avalanche rated ? p-channel ? 175 c operating temperature ?fast switching ? ease of paralleling ? simple drive requirements ? compliant to rohs directive 2002/95/ec description third generation power mosfets from vishay provide the designer with the best combi nation of fast switching, ruggedized device design , low on-resistance and cost-effectiveness. the to-220ab package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 w. the low thermal resistance and low package cost of the to-220ab contribute to its wide acceptance thro ughout the industry. notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. v dd = - 25 v, starting t j = 25 c, l = 18 mh, r g = 25 , i as = - 4.0 a (see fig. 12). c. i sd - 4.0 a, di/dt 75 a/s, v dd v ds , t j 175 c. d. 1.6 mm from case. product summary v ds (v) - 100 r ds(on) ( )v gs = - 10 v 1.2 q g (max.) (nc) 8.7 q gs (nc) 2.2 q gd (nc) 4.1 configuration single s g d p-channel mosfet to-220ab g d s rohs* compliant ordering information package to-220ab lead (pb)-free irf9510pbf sihf9510-e3 snpb irf9510 sihf9510 absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds - 100 v gate-source voltage v gs 20 continuous drain current v gs at - 10 v t c = 25 c i d - 4.0 a t c = 100 c - 2.8 pulsed drain current a i dm - 16 linear derating factor 0.29 w/c single pulse avalanche energy b e as 200 mj repetitive avalanche current a i ar - 4.0 a repetitive avalanche energy a e ar 4.3 mj maximum power dissipation t c = 25 c p d 43 w peak diode recovery dv/dt c dv/dt - 5.5 v/ns operating junction and storage temperature range t j , t stg - 55 to + 175 c soldering recommendations (p eak temperature) for 10 s 300 d mounting torque 6-32 or m3 screw 10 lbf in 1.1 n m * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 91072 2 s11-0506-rev. b, 21-mar-11 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irf9510, sihf9510 vishay siliconix notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -62 c/w case-to-sink, flat, greased surface r thcs 0.50 - maximum junction-to-case (drain) r thjc -3.5 specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source brea kdown voltage v ds v gs = 0 v, i d = - 250 a - 100 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = - 1 ma - - 0.091 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = - 250 a - 2.0 - - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na zero gate voltage drain current i dss v ds = - 100 v, v gs = 0 v - - - 100 a v ds = - 80 v, v gs = 0 v, t j = 150 c - - - 500 drain-source on-state resistance r ds(on) v gs = - 10 v i d = - 2.4 a b --1.2 forward transconductance g fs v ds = - 50 v, i d = - 2.4 a b 1.0 - - s dynamic input capacitance c iss v gs = 0 v, v ds = - 25 v, f = 1.0 mhz, see fig. 5 - 200 - pf output capacitance c oss -94- reverse transfer capacitance c rss -18- total gate charge q g v gs = - 10 v i d = - 4.0 a, v ds = - 80 v, see fig. 6 and 13 b --8.7 nc gate-source charge q gs --2.2 gate-drain charge q gd --4.1 turn-on delay time t d(on) v dd = - 50 v, i d = - 4.0 a, r g = 24 , r d = 11 , see fig. 10 b -10- ns rise time t r -27- turn-off delay time t d(off) -15- fall time t f -17- internal drain inductance l d between lead, 6 mm (0.25") from package and center of die contact -4.5- nh internal source inductance l s -7.5- drain-source body diode characteristics continuous source-dr ain diode current i s mosfet symbol showing the integral reverse p - n junction diode --- 4.0 a pulsed diode forward current a i sm --- 16 body diode voltage v sd t j = 25 c, i s = - 4.0 a, v gs = 0 v b --- 5.5 v body diode reverse recovery time t rr t j = 25 c, i f = - 4.0 a, di/dt = 100 a/s b -82160 ns body diode reverse recovery charge q rr - 0.15 0.30 c forward turn-on time t on intrinsic turn-on time is negligible (turn-on is dominated by l s and l d ) d s g s d g
document number: 91 072 www.vishay.com s11-0506-rev. b, 21-mar-11 3 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irf9510, sihf9510 vishay siliconix typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics, t c = 25 c fig. 2 - typical output characteristics, t c = 175 c fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature - v ds , drain-to-source voltage (v) - i d , drain current (a) 91072_01 20 s pulse width t c = 25 c - 4.5 v 10 0 10 1 10 1 10 0 bottom to p v gs - 15 v - 10 v - 8.0 v - 7.0 v - 6.0 v - 5.5 v - 5.0 v - 4.5 v - v ds , drain-to-source voltage (v) - i d , drain current (a) 10 1 10 0 10 0 10 1 20 s pulse width t c = 175 c 91072_02 - 4.5 v bottom to p v gs - 15 v - 10 v - 8.0 v - 7.0 v - 6.0 v - 5.5 v - 5.0 v - 4.5 v - v gs , gate-to-source voltage (v) - i d , drain current (a) 20 s pulse width v ds = - 50 v 10 1 10 0 5678910 4 25 c 175 c 91072_03 i d = - 4.0 a v gs = - 10 v 3.0 0.0 0.5 1.0 1.5 2.0 2.5 t j , junction temperature ( c) r ds(on) , drain-to-source on resistance (normalized) 91072_04 - 60- 40 - 20 0 20 40 60 80 100 120 140 160 180
www.vishay.com document number: 91072 4 s11-0506-rev. b, 21-mar-11 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irf9510, sihf9510 vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area 350 280 210 140 0 70 10 0 10 1 capacitance (pf) - v ds , drain-to-source voltage (v) c iss c rss c oss v gs = 0 v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 91072_05 q g , total gate charge (nc) - v gs , gate-to-source voltage (v) 20 16 12 8 0 4 0 2 10 8 6 4 v ds = - 20 v v ds = - 50 v for test circuit see figure 13 v ds = - 80 v 91072_06 i d = - 4.0 a 10 1 10 0 - v sd , source-to-drain voltage (v) - i sd , reverse drain current (a) 1.0 5.0 4.0 3.0 2.0 25 c 175 c v gs = 0 v 91072_07 10 -1 100 s 1 ms 10 ms operation in this area limited by r ds(on) - v ds , drain-to-source voltage (v) - i d , drain current (a) t c = 25 c t j = 175 c single pulse 10 -2 10 2 0.1 2 5 0.1 2 5 1 2 5 10 2 5 25 1 25 10 25 10 2 25 10 3 91072_08
document number: 91 072 www.vishay.com s11-0506-rev. b, 21-mar-11 5 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irf9510, sihf9510 vishay siliconix fig. 9 - maximum drain curre nt vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case 150 - i d , drain current (a) t c , case temperature (c) 25 91072_09 125 100 75 50 0.0 1.0 2.0 3.0 4.0 175 pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. - 10 v + - v ds v dd v gs 10 % 90 % v ds t d(on) t r t d(off) t f 10 1 0.1 10 -2 10 -5 10 -4 10 -3 10 -2 0.1 1 10 p dm t 1 t 2 t 1 , rectangular pulse duration (s) thermal response (z thjc ) notes: 1. duty factor, d = t 1 /t 2 2. peak t j = p dm x z thjc + t c single pulse (thermal response) 0.2 0.05 0.02 0.01 91072_11 0.1 d = 0.5
www.vishay.com document number: 91072 6 s11-0506-rev. b, 21-mar-11 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irf9510, sihf9510 vishay siliconix fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit r g i as 0.01 t p d.u.t l v ds + - v dd - 10 v var y t p to obtain required i as i as v ds v dd v ds t p 25 150 125 100 75 50 700 0 200 300 400 500 600 starting t j , junction temperature (c) e as , single pulse energy (mj) bottom to p i d - 1.6 a - 2.8 a - 4.0 a v dd = - 25 v 91072_12c 100 175 q gs q gd q g v g charge - 10 v d.u.t. - 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
document number: 91 072 www.vishay.com s11-0506-rev. b, 21-mar-11 7 this datasheet is subject to change without notice. the product described here in and this datasheet are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 irf9510, sihf9510 vishay siliconix fig. 14 - for p-channel vishay siliconix maintains worldw ide manufacturing capability. prod ucts may be manufactured at on e of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents su ch as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91072 . p.w. period di/dt diode recovery dv/dt body diode forward drop body diode forward current driver gate drive inductor current d = p.w. period + - - - - + + + peak dio d e recovery d v/ d t test circuit ? dv/dt controlled by r g ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low stray inductance ? g round plane ? low leakage inductance current tran s former r g ? compliment n-channel of d.u.t. for driver v dd ? i s d controlled by duty factor d note note a. v gs = - 5 v for logic level and - 3 v drive device s v gs = - 10 v a d.u.t. l s d waveform d.u.t. v d s waveform v dd re-applied voltage ripple 5 % i s d rever s e recovery current
package information www.vishay.com vishay siliconix revison: 14-dec-15 1 document number: 66542 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 to-220-1 note ? m* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for hvm m * 3 2 1 l l(1) d h(1) q ? p a f j(1) b(1) e(1) e e b c dim. millimeters inches min. max. min. max. a 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 c 0.36 0.61 0.014 0.024 d 14.33 15.85 0.564 0.624 e 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 f 1.14 1.40 0.045 0.055 h(1) 6.10 6.71 0.240 0.264 j(1) 2.41 2.92 0.095 0.115 l 13.36 14.40 0.526 0.567 l(1) 3.33 4.04 0.131 0.159 ? p 3.53 3.94 0.139 0.155 q 2.54 3.00 0.100 0.118 ecn: x15-0364-rev. c, 14-dec-15 dwg: 6031 package picture a s e xian
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